PCM Signal calculator

Details PCM Signal calculator PCM Signal calculator

1980-09-22

1982-11-02

Malzahn, David H.

Boots, shoes, and leggings

364754, G06F 749

Patent

active

043576745

ABSTRACT:
A PCM signal calculator for non-linear encoded PCM signals in the A-law system or .mu.-law system having a sign bit and a plurality of absolute value bits with three bits of segment number and four bits of step numbers within segment comprises; (a) a pair of input terminals for receiving the input PCM signals; (b) a signal or plurality of calculation means for providing the addition, subtraction and/or multiplication between the absolute values of two input PCM signals; (c) means for providing sign bit of the calculated result from the sign bits of the input PCM signals and/or the output of said calculation means; (d) an output terminal for providing the sign bit of the result from said means (c) and the absolute value of the result from said means (d). Said calculation means is either a table memory storing the result of each calculation according to the address designated by the input signals or combination of electronic components operating input PCM signals with segment number and step number within segment like a floating point number. Thus, the calculation of PCM signals encoded with non-linear encoding system like A-law and/or .mu.-law is performed without converting the PCM signals to linear signals.

REFERENCES:
patent: 4118785 (1978-10-01), Izumi et al.
patent: 4230908 (1980-10-01), Davis et al.
Brubaker et al., "Multiplication Using Logarithms Implemented with ROM", IEEE Trans. on Computers, vol. C-24, No. 8, Aug. 1975, pp. 761-765.
"Error Reduction in ROM Multipliers", Electronic Engineering, vol. 49, No. 593, Jun. 1977, p. 17.
Waser, "High-Speed Monolithic Multipliers for Real-Time Digital Signal Processing", Computer, Oct. 1978, pp. 19-29.
Deard, "Addition of Two PCM Coded Voltages", IBM Tech. Disclosure Bulletin, vol. 18, No. 10, Mar. 1976, pp. 3309-3310.

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