Synchronous semiconductor memory device with auto precharge oper

Details Synchronous semiconductor memory device with auto precharge oper Synchronous semiconductor memory device with auto precharge oper

1996-10-28

1998-05-05

Nelms, David C.

Static information storage and retrieval

Addressing

Sync/clocking

36523003, 36523006, 36518908, 36518912, G11C 800, G11C 700

Patent

active

057485607

ABSTRACT:
An internal read/write termination detect circuit generates a one shot pulse signal when a read operation activation signal and a write operation activation signal are both set to an inactive state. An internal operation activation signal generation circuit holds an auto precharge enable signal by a flipflop according to an auto precharge command to generate a precharge operation trigger signal according to the auto precharge enable signal and the one shot pulse signal. An internal operation activation signal is reset to an inactive state. The auto precharge command is made valid to carry out an internal precharge operation only when internal write/read operation is completed. A synchronous semiconductor memory device with easy control of an auto precharge command and reduced in layout area is provided.

REFERENCES:
patent: 5555526 (1996-09-01), Kim
patent: 5631871 (1997-05-01), Park et al.
patent: 5636173 (1997-06-01), Schaefer

Affiliated with

Also associated with

Rating

Synchronous semiconductor memory device with auto precharge oper does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Synchronous semiconductor memory device with auto precharge oper, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Synchronous semiconductor memory device with auto precharge oper will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-62702