Modular test structure for single chip digital exchange controll

Details Modular test structure for single chip digital exchange controll Modular test structure for single chip digital exchange controll

1988-09-30

1990-05-15

Lall, Parshotam S.

Boots, shoes, and leggings

364580, 364900, 371 27, 371 201, 324 731, G06F 1100

Patent

active

049263633

ABSTRACT:
A modular test structure for performing testing on a single chip having a plurality of different functional blocks is provided which includes test interface logic circuitry (24) formed on each of the functional blocks (16-22) so that each block can be operated as a self-contained module. Test generation logic circuitry (40) is formed in a bus interface unit (12) and is used to select one or more of the functional blocks (16-22) for testing and for placing the selected functional blocks (16-22) in a test mode. The test interface logic circuitry (24) on the selected functional blocks under test sends data direction information to the bus interface unit (12) to indicate how individual bits of a data bus are to be used for inputs and outputs during testing.

REFERENCES:
patent: 4069510 (1978-01-01), Carlow et al.
patent: 4393498 (1983-07-01), Jackson et al.
patent: 4402055 (1983-08-01), Lloyd et al.
patent: 4656632 (1987-04-01), Jackson
patent: 4706186 (1987-11-01), Mogi et al.
patent: 4718064 (1988-01-01), Edwards et al.

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