Multilayer interconnect and method of forming same

Details Multilayer interconnect and method of forming same Multilayer interconnect and method of forming same

1986-02-12

1990-05-15

James, Andrew J.

357 59, 357 68, H01L 2348, H01L 2904

Patent

active

049262360

ABSTRACT:
A multilayer interconnect and method of forming the same between first and second overlying conductive strips separated by an insulating layer having an aperture therethrough. The improvement wherein at least one edge of the first strip is aligned with an overlying edge of the second strip. The interconnect is formed by depositing the second strip on the insulating layer such that it at least partially overlaps the aperture and extends beyond an edge of the first strip. The second strip and first strip are then partially removed such that at least one edge of the first and second conductive strips are aligned.

REFERENCES:
patent: 4136434 (1979-01-01), Thibault et al.
patent: 4326331 (1982-04-01), Guterman
patent: 4513397 (1985-04-01), Ipri et al.
patent: 4536951 (1985-08-01), Rhodes et al.
patent: 4582563 (1986-04-01), Hazuki et al.
Arzubi et al, "Metal-oxide Semiconductor Capacitor", IBM Technical Disclosure Bulletin, vol. 17, No. 6, Nov. 1984.
K. Heuber et al, "Self-Aligned Multiline Via Hole", IBM Technical Disclosure Bulletin, vol. 20, No. 9, Feb. 1978.

Affiliated with

Also associated with

Rating

Multilayer interconnect and method of forming same does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multilayer interconnect and method of forming same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multilayer interconnect and method of forming same will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-625110