Patent
1988-06-29
1990-05-15
James, Andrew J.
357 55, 357 47, H01L 2702
Patent
active
049262335
ABSTRACT:
A BICMOS fabrication technique utilizing trench depressions for forming bipolar and PMOS transistors. The trench depressions each have high conductivity diffusion sidewalls for functioning respectively as a collector conductor and a guard ring. The trench depressions include thin dielectric sidewalls for allowing small area transistors. NMOS devices are formed within the substrate material. The fabrication process allows a high degree of self-alignment and thus reduces numerous masking steps.
REFERENCES:
patent: 4528047 (1985-07-01), Beyer et al.
patent: 4749661 (1988-06-01), Bower
"A Flat-Panel Display Control IC with 150-V Drivers", Masatoshi Kimura Takeaki Okabe, Isao Shimizu, Yasuo Nagai and Kazuo Hoya, IEEE Journal of Solid-State Circuits, vol. SC-21, No. 6, Dec., 1986, pp. 971-975.
"A New Isolation Technology for Bipolar Devices By Low Pressure selective Silicon Epitaxy", S. Hine, T. Hirao, S. Kayano, and N. Tsubouchi, LSI Research and Development Laboratory, Mitsubishi Electric Corp., Itami, Japan, pp. 116-117.
"Advanced Dielectric Isolation Through Selective Epitaxial Growth Techniques", John O. Borland, Clifford I. Drowley, Solid State Technology, Aug., 1985, pp. 141-148.
Barndt B. Peter
Comfort James T.
James Andrew J.
Prenty Mark
Sharp Melvin
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