Dynamic memory of the integrated circuit type

Details Dynamic memory of the integrated circuit type Dynamic memory of the integrated circuit type

1989-09-06

1990-05-15

James, Andrew J.

357 41, 357 49, 357 51, 357 59, H01L 2978, H01L 2702, H01L 2904

Patent

active

049262238

ABSTRACT:
In a dynamic memory for capacitive data storage, enhanced data storage and transfer performances are achieved on the one hand by increasing the value of storage capacitance and on the other hand by increasing the conductivity of the transfer lines. The word lines of the memory cells are metallized in order to increase the speed of propagation of reading and/or writing instructions. Metallization of the word lines makes it possible to cover the memory cell with a second polysilicon layer followed by a third polysilicon layer in order to increase the data-storage capacity.

REFERENCES:
patent: 4151607 (1979-04-01), Koyanagi et al.
patent: 4329706 (1982-05-01), Crowder et al.
patent: 4355374 (1982-10-01), Sakai et al.
patent: 4641166 (1987-02-01), Takemae et al.
patent: 4649406 (1987-03-01), Takemae et al.
IEEE Journal of Solid State Circuits, vol. SC-16, No. 5, Oct. 1981, pp. 499-505, New York, U.S.; Hu H. Chao et al., "A 34 .mu.m.sup.2 DRAM Cell Fabricated with a 1 .mu.m Single-Level Polycide FET Technology", *FIG. 3*.

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