Error correction coding and decoding circuit for digitally coded

Details Error correction coding and decoding circuit for digitally coded Error correction coding and decoding circuit for digitally coded

1988-08-31

1991-03-26

Smith, Jerry

Excavating

G06F 1110

Patent

active

050035401

ABSTRACT:
An error correction coding and decoding circuit for digitally coded information in which a majority difference set cyclic code is used to apply error correction coding and decoding to a data signal having data bits suitably assigned to information bits and parity bits, characterized in that a clock signal (CLKC) for the internal operation of the circuit, a data load clock signal for loading data onto the circuit, and a data read clock signal for reading data from the circuit are delivered from an external circuit provided separately from the error correction coding and decoding circuit.

REFERENCES:
patent: 3587042 (1971-06-01), Mitchell
patent: 4630271 (1986-12-01), Yamada
patent: 4672612 (1987-06-01), Shishikura
patent: 4675868 (1987-06-01), Shishikura
patent: 4701914 (1987-10-01), Matsushita

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