Circuit and method for adding binary numbers with a difference o

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G06F 750

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active

049338943

ABSTRACT:
The subject invention is a circuit and method of providing the sum of first and second n bit binary numbers having a difference of one or less. The method comprises combining the least significant bits of the numbers in a first coincidence gate to provide the least significant bit of the sum, combining the nth and (n-1)st bits of the numbers in a first logic network to provide the most significant bit of the sum, and combining solely the ith and (i-1)st bits of the numbers in an ith logic network to provide the ith bit of the sum, for all values of i where 1<i<n+1.

REFERENCES:
patent: 4052604 (1977-10-01), Maitland et al.
patent: 4054788 (1977-10-01), Maitland et al.

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