Fishing – trapping – and vermin destroying
Patent
1990-02-09
1991-07-09
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437912, 437944, 437200, 437229, 437 39, 437 41, 437177, 437924, 148DIG100, 148DIG140, H01L 2144
Patent
active
050305891
ABSTRACT:
A production method of a semiconductor device includes a first process for producing a gate electrode pattern of double layer structure on a semiconductor substrate, which gate electrode pattern comprises a first layer and a second upper heat-resistant material layers each having different etching property, a second process for plating a resist film on the entire surface of the substrate and etching the same to expose the top portion of the second upper heat-resistant material layer, a third process for removing the second upper heat-resistant material layer, a fourth process for hardening the surface of the resist and conducting over development of the resist, and a fifth process for plating a low resistance metal material on the entire surface of the substrate and removing the low resistance metal material together with the resist film by lift-off method, thereby to produce a gate electrode comprising the first lower heat-resistant material layer and a low resistance metal layer which is produced thereon, wherein the low resistance metal layer has a larger width than that of the first lower heat-resistant material layer.
REFERENCES:
patent: 4729966 (1988-03-01), Koshino et al.
patent: 4735913 (1988-04-01), Hayes
patent: 4839304 (1989-06-01), Morikawa
patent: 4849376 (1989-07-01), Balzan et al.
patent: 4871419 (1989-10-01), Nakano
patent: 4923823 (1990-05-01), Kohno
Dang Trung
Hearn Brian E.
Mitsubishi Denki & Kabushiki Kaisha
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