Static information storage and retrieval – Addressing
Patent
1983-06-28
1985-09-03
Moffitt, James W.
Static information storage and retrieval
Addressing
365154, 365190, G11C 1940, G11C 800
Patent
active
045396612
ABSTRACT:
In a static-type semiconductor memory device, one word line (WL.sub.0, ---) and one pair of bit lines (BL.sub.0, BL.sub.0, ---) are selected by row address decoders, column address decoders, and the like, upon receipt of address information so as to select one memory cell (C.sub.00, ---). The row address decoders are activated by a word-line driver clock signal (.phi..sub.W) of a word line driver. The word-line driver clock signal (.phi..sub.W) is generated only during a predetermined time period after the change of address information, and, accordingly, the selection time period of the word line is small.
REFERENCES:
patent: 4354259 (1982-10-01), Ishimoto
patent: 4396845 (1983-08-01), Nakano
patent: 4480320 (1984-10-01), Naiff
Fujitsu Limited
Moffitt James W.
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