Integrated circuit device including both N-channel and P-channel

Details Integrated circuit device including both N-channel and P-channel Integrated circuit device including both N-channel and P-channel

1976-12-10

1980-12-16

Munson, Gene M.

357 23, 357 52, 357 89, H01L 2702, H01L 2978, H01L 2934

Patent

active

042400937

ABSTRACT:
A complementary MOS integrated circuit device, adapted for fabrication with relatively high circuit density, includes relatively fast transistors with a closed gate geometry. Permanently-off gates surround transistors to isolate them from other transistors.
A method of making this structure involves self-aligned gate techniques in which the sources and drains are defined as regions which surround the gates and are surrounded by the gates, respectively.

REFERENCES:
patent: 3315096 (1967-04-01), Carlson et al.
patent: 3608189 (1971-09-01), Gray
patent: 3712995 (1973-01-01), Steudel
patent: 3786319 (1974-01-01), Tomisaburo
patent: 3806371 (1974-04-01), Barone
patent: 3868721 (1975-02-01), Davidsohn
patent: 3886583 (1975-05-01), Wang
RCA COS/MOS Integrated Circuits Manual, (3/71), p. 24-26, RCA, Somerville, N.J.

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