Noise-immune interrupt level sharing

Details Noise-immune interrupt level sharing Noise-immune interrupt level sharing

1985-04-26

1988-08-16

Shaw, Gareth D.

Boots, shoes, and leggings

371 64, 3408255, G06F 946, G06F 1130

Patent

active

047648937

ABSTRACT:
An interrupt interface circuit for connection to a shared interrupt request line. An internally generated interrupt impresses an interrupt request line and also locks out any further interrupt requests until the interrupt request is analyzed to be of a minimum duration, in which case the lock out is latched. An interrupt request on the shared interrupt request line is also analyzed for minimum duration before it causes a lock out to be latched. A latched lock out is removed by a signal generated by the interrupt handler.

REFERENCES:
patent: 4282573 (1981-08-01), Imai et al.
patent: 4410938 (1983-10-01), Higashiyama
patent: 4599695 (1986-07-01), Deutsch
patent: 4630041 (1986-12-01), Casmatta et al.
patent: 4631670 (1986-12-01), Bradley et al.
Patent Abstracts of Japan, vol. 7, No. 278 (p. 242) [1423], 10th Dec., 1983; & JP-A-58 155 447 (Tokyo Shibaura Denki K.K.) 16-09-1983.
IBM Technical Disclosure Bulletin, vol. 18, No. 3, Aug. 1975, pp. 767, 768, P. Favre: "Device for Fast I/O Selection".
Patent Abstracts of Japan, vol. 8, No. 169 (p. 292) [1606], 4th Aug. 1984 & JP-A-59 65 333 (Fujitsu K.K.) 13-04-1984.

Affiliated with

Also associated with

Rating

Noise-immune interrupt level sharing does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Noise-immune interrupt level sharing, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Noise-immune interrupt level sharing will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-604394