Bit slice - type arithmetic adder circuit using exclusive-or log

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G06F 750

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active

047648864

ABSTRACT:
An adder circuit of bit slice type comprises a first circuit for receiving first and second binary input signals A and B of a certain bit length (M+1) and producing parallel output signals, a second circuit means for producing carry signals, and a third circuit for producing the result of the addition of said first and second binary input signals.
The adder circuit is characterized in that the first circuit comprises a plurality of arithmetic and logical circuits each receiving two pairs of the input bit signals (A.sub.2n+1, A.sub.2n, B.sub.2n+1, B.sub.2n) which correspond to the contents of the two adjacent bits of said input binary signals. The arithmetic and logical circuit of the first circuit outputs signals G.sub.2n+1, P.sub.2n+1, X.sub.2n+1, X.sub.2n and Y.sub.2n of the following logical formula.

REFERENCES:
patent: 4504924 (1985-03-01), Cook et al.
patent: 4584661 (1986-04-01), Grundland
patent: 4623981 (1986-11-01), Wolrich et al.

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