Excavating
Patent
1993-07-07
1995-10-17
Ramirez, Ellis B.
Excavating
371223, 371 221, 371 226, 371 214, H04B 1700
Patent
active
054597374
ABSTRACT:
A test access port (TAP) controls monitoring and testing of static current IDDQ in integrated circuit (IC) devices having both a TAP of the type specified in IEEE Standard 1149.1 Test Access Port and Boundary Architecture and built-in current (BIC) monitors. BIC monitors are coupled between MOS or CMOS modules of the IC device and the low potential power rail (GND) for monitoring static current IDDQ. Bypass or shunt MOS transistors (N1,N2, . . . , NN) are coupled with primary current paths in parallel with the respective BIC monitors between the CMOS circuit modules and low potential power rail (GND). The TAP data registers (TDR's) include a design specific BIC shunt control TDR (BICSC TDR) constructed for receiving a coded BIC monitor bypass code (BICBC) at the TDI pin. BICSC TDR outputs are coupled to control nodes of the respective MOS bypass transistors (N1,N2, . . . , NN) for controlling the conducting state of the bypass transistors according to the BICBC. The MOS bypass transistor provides a low impedance bypass path around the BIC current monitor in response to a first BICBC during normal operation of the IC device and presents a high impedance bypass path in response to a second BICBC for monitoring quiescent IDDQ at the BIC monitor.
REFERENCES:
patent: 5025344 (1991-06-01), Maly et al.
patent: 5056093 (1991-10-01), Whetsel
patent: 5254942 (1993-10-01), D'Souza et al.
"IDDQ Benefits" by Steven D. McEuen, Ford Microelectronics Inc., 9965 Federal Drive Colorado Springs, Colo. 80921, published in 1991 IEEE VLSI Test Symposium, Paper 14.1 pp. 285-290.
"Comparing Stuck Fault and Current Testing via CMOS Chip Test", by Tom Storey and Wohceich Maly, Carnegie Melon University, Pittsburgh, Pa. and John Andrews and Myron Miske, National SEmiconductor Corporation, South Portland, Me published at the European Test Conference, Apr. 1991.
"Circuit Design for Built-In Current Testing" by M. Patyra and W. Maly, Carnegie Mellon University, Pittsburgh, Pa. IEEE 1991 Custon Integrated Circuit Conference.
Kane Daniel H.
National Semiconductor Corporation
Pitruzzella Vincenzo D.
Ramirez Ellis B.
Robinson Stephen R.
LandOfFree
Test access port controlled built in current monitor for IC devi does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Test access port controlled built in current monitor for IC devi, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Test access port controlled built in current monitor for IC devi will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-603628