Circuit testing apparatus

Excavating

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G06F 1100

Patent

active

049858939

ABSTRACT:
Generally there is provided a ROM memory arranged to be inserted in place of a pre-existing ROM on the microprocessor based circuit board under test, wherein the ROM contains specific test sequences programmed therein. The test apparatus further includes a microprocessor control, a keypad, a display and an interface. On start up the circuit under test runs programs stored in the inserted ROM and outputs on the data bus information relative to the results. During some tests the circuit is held in a wait state to allow probing of the circuit under test for logic errors. In an operator programmed test mode the operator may cause the system to read and write data in response to entries from the keypad.

REFERENCES:
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patent: 3930146 (1975-12-01), Bogacz
patent: 4405898 (1983-09-01), Flemming
patent: 4455654 (1984-06-01), Bhaskar et al.
patent: 4547845 (1985-10-01), Ross
patent: 4691316 (1987-09-01), Phillips
patent: 4703482 (1987-10-01), Auger et al.
patent: 4785416 (1988-11-01), Stringer
Falk, H. "Emulators Keep Space with Chip Speeds and Complexity" Computer Design, May 15, 1987, 31-38.

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