Boots – shoes – and leggings
Patent
1995-04-07
1997-07-01
Mai, Tan V.
Boots, shoes, and leggings
G06F 738
Patent
active
056445199
ABSTRACT:
A method and apparatus for a multiply accumulate circuit (10) having a programmable saturation value is accomplished by providing saturation logic (20) that receives a saturation range signal (32) from a Digital Signal Processor (DSP) programmer. The saturation range signal (32) is then converted to a selected saturation value (34) and provided as an input to the saturation logic (20). The saturation logic (20) utilizes the selected saturation value (34) to establish an intermediate saturation value (30). For each intermediate resultant generated by the multiply and accumulate circuit (10), the intermediate resultant is compared with the intermediate saturation value (30). When the intermediate resultant compares unfavorably to the intermediate saturation value (30), a saturation default value (42) is supplied to the accumulator register. Additionally, the final accumulate result is compared against a final saturation value, and, if unfavorable, a saturation value is provided as the final result.
REFERENCES:
patent: 5208770 (1993-05-01), Ito
patent: 5402368 (1995-03-01), Yamada et al.
DSP56100 Digital Signal Processor Family Manual; Section 2: CPU Architecture Overview, pp. 2-1 through 2-7; Section 3: Data ALU, pp. 3-1 through 3-19.
Girardeau, Jr. James W.
Yatim David
Mai Tan V.
Motorola Inc.
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