Patent
1973-07-26
1980-11-18
Smith, Jr., David
357 40, 357 71, H01L 2704
Patent
active
042348889
ABSTRACT:
A complex integrated circuit comprising a wafer which has a plurality of cells each having signal-connect pads in a first layer of metalization on the wafer and which has an imperfect yield of usable cells. The circuit further includes a laminae of alternate layers of dielectric insulation and metalization formed on the wafer wherein: a first layer of insulation has vias formed therethrough to expose signal-connect pads of selected usable cells; a second layer of metalization has conductors formed therein which operably interconnect the exposed signal-connect pads of one or more groups of usable cells into individual functional circuits and, where needed, include pad relocation conductors which route the signal-connects of individual cells and the signal-connects of interconnected groups of cells to master pattern circuit locations; a second layer of insulation has vias formed therethrough which expose signal-connect portions at the master pattern circuit locations; and a third layer of metalization is formed into conductors that interconnect the signal-connects at master pattern locations into a functionally specified circuit type.
REFERENCES:
patent: 3303400 (1967-02-01), Allison
patent: 3423822 (1969-01-01), Davidson et al.
patent: 3434020 (1969-03-01), Ruggiero
patent: 3518751 (1970-07-01), Waters et al.
Bennett Barry
Calhoun Donald F.
Hughes Aircraft Company
MacAllister W. H.
Smith Jr. David
Sternfels Lewis B.
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