System and method of data communication in multiprocessor system

Details System and method of data communication in multiprocessor system System and method of data communication in multiprocessor system

1998-10-14

2000-08-22

Vu, Viet D.

Electrical computers and digital processing systems: multicomput

Multicomputer data transferring via shared memory

709215, 709312, 711153, 711157, G06F 1314

Patent

active

061086932

ABSTRACT:
A multiprocessor system has a transmitting processor and a receiving processor. In response to a transmission request, the transmitting processor implements means for selecting one of two communication buffers of a shared memory in accordance with a given rule; write inhibit means for changing the selected communication buffer to a write-disabled state in order to inhibit writing of the selected communication buffer by other processors; data writing means for copying data from a local memory to the selected communication buffer; write-completion notifying means for notifying a receiving processor of completion of writing; and transmission-end discriminating means for discriminating end of transmission processing. In response to a reception request, the receiving processor implements means for selecting one of the two communication buffers of the shared memory by a rule identical with that of the communication buffer selecting means of the transmitting processor; read wait means for causing this processor to wait until the selected communication buffer attains a read-enabled state; data reading means for copying data from the selected communication buffer to a local memory; read completion notifying means for changing the communication buffer to a write-enabled state after data is read in; and means for discriminating end of reception processing. The communication band-width performance is enhanced.

REFERENCES:
patent: 5815167 (1998-09-01), Muthal et al.
patent: 6044438 (2000-03-01), Olnowich

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