Input offset voltage trimming network and method

Details Input offset voltage trimming network and method Input offset voltage trimming network and method

1987-12-11

1989-05-02

Mullins, James B.

Amplifiers

With semiconductor amplifying device

Including differential amplifier

330261, H04F 345

Patent

active

048272221

ABSTRACT:
Trimming of input offset voltage of a diferential amplifier is provided by a pair of resistance networks which are connected to the emitters of a pair of current mirror transistors. By adjusting the resistances of the resistance networks, the adjustment currents flowing through the current mirror transistors are selected to cancel out the input offset voltage of the differential amplifier. Each resistance network includes a plurality of resistors connected in series with a low resistance shorting link connected in parallel with each of the plurality of resistances. The input offset voltage is trimmed by selectively cutting the shorting links with a two-phase measure and trim process.

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Faber, "Algorithmic Trimming on Active Circuitry," Proceedings 1974, 24th Electronic Components Conference, pp. 248-254.

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