High density semiconductor circuit using CMOS transistors

Details High density semiconductor circuit using CMOS transistors High density semiconductor circuit using CMOS transistors

1982-05-14

1989-11-28

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3074821, 307451, 307585, 3073032, 357 42, 357 237, H01L 2702, H01L 2978, H01L 2712, H03K 19094

Patent

active

048839868

ABSTRACT:
A semiconductor circuit has a power source terminal set at a positive potential, a reference potential terminal set at a reference potential, a first MOS transistor whose current path is connected between the power source terminal and an output terminal, and a second MOS transistor whose current path is connected between the output terminal and the reference potential terminal. The gates of the first and second MOS transistors are commonly connected to an input terminal. The first and second MOS transistors are respectively n- and p-channel MOS transistors.

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Evans, Designing with FETs, McGraw-Hill, Inc., pp. 83-89, 1981.
Bingham, "CMOS: Higher Speeds, More Drive and Analog Capability Expand Its Horizons", Electronic Design 23, pp. 74-84, 11-8-1978.

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