High speed sample and hold signal generator

Details High speed sample and hold signal generator High speed sample and hold signal generator

1992-01-23

1994-10-04

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307262, 307265, 307269, 307353, H03K 501, H03K 515, G11C 2702

Patent

active

053529332

ABSTRACT:
An improved sample and hold signal generator produces very short delay intervals between successive sample-to-hold transitions that are both collectively and individually adjustable. A plurality of capacitors are charged to a precharge level upon the occurrence of a precharge signal and discharged to the threshold level of a plurality of amplifiers through a plurality of constant current sources upon the occurrence of a discharge signal. When the voltage on a particular capacitor is discharged to the threshold level, the associated amplifier produces a sample-to-hold signal transition and the voltage level of a signal being sampled is stored on a capacitor. In successive cells of the sample and hold generating means the threshold level is reached at incrementally varying delay times that are separated by approximately equal time intervals. Varying the precharge voltage, the constant current that discharges the capacitor, and, in one version, the threshold of non-linearity of a non-linear capacitor (source-drain coupled MOS FET transistor), can be used in different combinations to control the timing of individual cells or the delay of the whole set of cells.

REFERENCES:
patent: 3921079 (1975-11-01), Heffner et al.
patent: 4271488 (1981-06-01), Saxe
patent: 4647791 (1987-03-01), Pellegrini
patent: 4922452 (1990-05-01), Larson et al.

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