Computer system performance indicator

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G06F 1100

Patent

active

040343537

ABSTRACT:
Computer monitor instructions are placed in appropriate locations in a routine to be monitored. Upon their execution, a decoder appropriately activates or de-activates circuitry, which develops time-related performance parameters. These time-related parameters are produced by a first counter which counts to one second and then resets a second, sampling counter. The sampling counter is stepped by clock pulses gated to it in response to a decoder activation signal. Each second the sampling counters contents are gated to a register to control the height of a bar graph display. Alternatively, the sampling counter contents may be summed over a number of intervals and divided by that number of intervals to produce an average count for controlling the bar graph display. Lastly, the number of decoder activations may be counted over the one second interval to provide a rate indication.

REFERENCES:
patent: 3750105 (1973-07-01), Raynham
patent: 3763474 (1973-10-01), Freeman et al.
patent: 3771144 (1973-11-01), Belady et al.
patent: 3904860 (1975-09-01), Huber et al.

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