Data processing system having shared memory

Details Data processing system having shared memory Data processing system having shared memory

1982-02-22

1985-01-01

Ruggiero, Joseph F.

Boots, shoes, and leggings

G06F 1300, G06F 1306

Patent

active

044919093

ABSTRACT:
In a data processing system, data is transferred between a plurality of functional devices through a shared memory without the intervention of the processor. The data transfer is controlled by a Shared Memory Access Channel (SMAC) having a pointer table storing memory addresses to control shared memory accesses and by the functional devices using device addresses, pointer identifers, indicating the pointer to be used from the pointer table, and control codes. The control codes used in the transfer include a Post code (P code), an Available code (A code) and an End of Process Code (E code). The device, from which data is transferred, is referred to as the upstream device, and the device to which data is transferred is referred to as the downstream device. The P code tells the downstream device that the upstream device has written a predetermined amount of data into a shared buffer area in the memory. The A code tells the upstream device that space is available in the buffer area for writing data to be transferred to the downstream device. The E code tells the downstream device that the data transfer operation from the upstream device has been completed.

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patent: 4204251 (1980-05-01), Brudevold
patent: 4212057 (1980-07-01), Devlin et al.
patent: 4335426 (1982-06-01), Maxwell et al.
patent: 4376982 (1983-03-01), Bantz et al.
patent: 4378588 (1983-03-01), Katzman et al.
patent: 4394734 (1983-01-01), Norgren et al.
patent: 4400771 (1983-08-01), Suzuki et al.
patent: 4414624 (1983-11-01), Summer, Jr. et al.

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