Fishing – trapping – and vermin destroying
Patent
1992-04-15
1994-02-01
Fourson, George
Fishing, trapping, and vermin destroying
437919, H01L 2176
Patent
active
052832040
ABSTRACT:
The invention is directed to maximizing storage cell surface area in a high density/high volume DRAM (dynamic random access memory) fabrication process. Fabrication methods are disclosed that, when used with existing capacitor fabrication processes, will reduce cell leakage and allow for increased capacitance. The present invention corrects any severed storage node poly that may have resulted from a misalignment of a masking pattern used for defining future buried contacts by placing passivation oxidation over the existing wafer surface which, in effect, seals off the severed storage node poly form the capacitor's top cell plate poly. The passivation oxidation prevents cell plate to plate leakage while protecting the severed storage node poly from subsequent deposition of conductive layers.
REFERENCES:
patent: 4985718 (1991-01-01), Ishijima
patent: 5017982 (1991-05-01), Kobayashi
Lowrey Tyler A.
Rhodes Howard E.
Fourson George
Micron Semiconductor Inc.
Paul David J.
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