Method of fabricating complementary semiconductor device

Details Method of fabricating complementary semiconductor device Method of fabricating complementary semiconductor device

1992-07-27

1994-02-01

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 34, 437 45, 437 57, H01L 21265

Patent

active

052832007

ABSTRACT:
According to this invention, an impurity for forming a P-well region and an impurity for forming an N-channel stopper are sequentially doped in an N-channel region, and an impurity for forming an N-well region and an impurity for forming a P-channel stopper are sequentially doped in a P-channel region. After these impurities are diffused by annealing, an impurity for adjusting a threshold voltage is doped in the entire surface of the resultant structure. As described above, since the doping of these impurities can be performed by steps using a total of two masks, the steps in fabricating a complementary semiconductor device are simple. In addition, since the impurities for forming the well regions and the channel stoppers are diffused by annealing, a large margin against punch through in an element isolation region can be obtained. Furthermore, since the impurity for adjusting a threshold voltage is doped after annealing is performed, diffusion of this impurity is suppressed, thereby minimizing gate swing and the like.

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