Stacked type capacitor having a dielectric film formed on a roug

Details Stacked type capacitor having a dielectric film formed on a roug Stacked type capacitor having a dielectric film formed on a roug

1992-04-30

1994-03-01

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437233, 437977, 148DIG1, H01L 21441

Patent

active

052907295

ABSTRACT:
A lower electrode of a stacked capacitor in accordance with the present invention is formed of a silicon layer formed by low pressure CVD method. The silicon layer is formed by thermal decomposition of monosilane gas at a prescribed temperature. By setting partial pressure of the monosilane gas and formation temperature at prescribed values, the silicon layer is formed to be in a transitional state between poly crystal and amorphous. Such silicon layer has large concaves and convexes on the surface thereof. Consequently, opposing areas of the electrodes of the capacitor can be increased, and therefore electrostatic capacitance of the capacitor is also increased.

REFERENCES:
patent: 4855801 (1989-08-01), Kuesters
patent: 4874716 (1989-10-01), Rao et al.
patent: 5043780 (1991-08-01), Fazan et al.
Joubert et al., "The Effect of Low Pressure on the Structure of LPCVD Polycrystalline Silicon Films", J. Electrochem. Soc. Solid State Science & Tech., Oct. 1987, pp. 2541-2545.
Wolf et al., "Silicon Processing for the VLSI Era", pp. 177-182, 1986.
Extended Abstracts of the 21st Conference on Solid State Devices, "Capacitance-Enhanced Stacked-Capacitor with Engraved Storage Electrode for Deep Submicron DRAMs", Mine et al., 1989, pp. 137-140.

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