Metal working – Method of mechanical manufacture – Electrical device making
Patent
1989-04-18
1989-11-28
Eley, Timothy V.
Metal working
Method of mechanical manufacture
Electrical device making
29852, 29846, 156644, 156656, 1566591, 1566611, 156901, 156902, 427 96, 427 97, 427125, 427259, 427264, 427265, 427331, 427404, 174 685, H05K 306, H05K 328, H05K 346
Patent
active
048828394
ABSTRACT:
According to a method of manufacturing a multi-layered wiring substrate, a palladium thin film is formed on an entire surface of a substrate including a conductor wiring layer. A portion except for a predetermined via formation portion on the palladium thin film is masked by a first photoresist. A polyimide-based conductive resin is embedded in the via formation portion through the first photoresist. The first photoresist is removed. The conductor wiring layer and the via formation portion are masked by a second photoresist. The exposed palladium thin film is etched. The second photoresist is removed. The conductive resin is cured. A photosensitive polyimide resin is applied to an entire surface of the substrate, a via-hole is formed in the via formation portion, and the photosensitive polyimide resin is cured.
REFERENCES:
patent: 4360570 (1982-11-01), Andreades et al.
patent: 4381327 (1983-04-01), Briere
patent: 4526859 (1985-07-01), Christensen et al.
patent: 4569876 (1986-02-01), Nakakita
patent: 4693925 (1987-09-01), Cheung et al.
patent: 4708904 (1987-11-01), Shimizu et al.
patent: 4752555 (1988-06-01), Takada et al.
patent: 4757033 (1988-07-01), Ebata
patent: 4780957 (1988-11-01), Shiga et al.
patent: 4801469 (1989-01-01), Norwood
patent: 4806188 (1989-02-01), Rellick
patent: 4818335 (1989-04-01), Karnett
patent: 4824716 (1989-04-01), Yerman
"Mechanically Bonded Circuit", Haddad et al., IBM Technical Disclosure Bulletin, vol. 2, No. 1, 6/1959.
"Molded Printed Circuit", Kollmeier et al., IBM Technical Disclosure Bulletin, vol. 9, No. 11, 4/1967.
"Depositing Adhesion Layers for Contact Between Noble Metals and Dielectric Material", Romankiw, IBM Technical Disclosure Bulletin, vol. 18, No. 5, 10/1975.
"MCP via Configurations", IBM Technical Disclosure Bulletin, vol. 24, No. 5, (Oct. 1918), pp. 2575-2576, Abolafia et al.
"Controlled Diffusion Bonding in Multilevel Package", IBM Technical Disclosure Bulletin, vol. 24, No. 12, (May 1982), pp. 6364-6365, D. Clocher et al.
"High Reliability Metallurgical Structure for Multilevel Substrate Wiring", IBM Technical Disclosure Bulletin, vol. 24, No. 12, (May 1982), p. 6370, W. B. Archey et al.
Eley Timothy V.
NEC Corporation
Vo Peter D.
LandOfFree
Method of manufacturing multi-layered wiring substrate does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing multi-layered wiring substrate, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing multi-layered wiring substrate will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-574666