Semiconductor memory device

Static information storage and retrieval – Addressing – Plural blocks or banks

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Details

36518511, 36518533, 36518901, G11C 700

Patent

active

057346216

ABSTRACT:
A semiconductor memory device includes: a first memory cell array and a second memory cell array for receiving a first control signal, a second control signal, and a third control signal so as to be controlled by the first control signal, the second control signal, and the third control signal. Data stored in the first memory cell array is read when the first control signal and the second control signal are placed in an enable state. Data stored in the second memory cell array is read when the second control signal and the third control signal are placed in an enable state.

REFERENCES:
patent: 5245572 (1993-09-01), Kosonocky et al.
patent: 5305281 (1994-04-01), Lubeck
patent: 5570320 (1996-10-01), Runas

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