Methods of manufacturing microelectronic substrate assemblies fo

Details Methods of manufacturing microelectronic substrate assemblies fo Methods of manufacturing microelectronic substrate assemblies fo

1998-09-02

2000-08-22

Ramsey, Kenneth J.

Electric lamp or space discharge component or device manufacturi

Process

With assembly or disassembly

H01J 102

Patent

active

061063517

ABSTRACT:
The present disclosure describes microelectronic substrate assemblies, and methods for making and using such substrate assemblies in mechanical and chemical-mechanical planarizing processes. A microelectronic substrate assembly is fabricated in accordance with one aspect of the invention by forming a critical layer in a film stack on the substrate and manipulating the critical layer to have a low compression internal stress. The critical layer, more specifically, is a layer that is otherwise in a tensile state or a high compression state without being manipulated to control the internal stress in the critical layer to be in a low compression state. The stress in the critical layer can be manipulated by changing the chemistry, temperature or energy level of the process used to deposit or otherwise form the critical layer. The stress in the critical layer can also be manipulated using heat treatments and other processes. A critical layer composed of chromium, for example, can be manipulated by sputtering chromium in an argon
itrogen atmosphere instead of solely an argon atmosphere to impart stress controlling elements (nitrogen molecules) into the chromium for producing a low compression chromium layer.

REFERENCES:
patent: 4873162 (1989-10-01), Yoshioka et al.
patent: 5905005 (1999-05-01), Yabe et al.
patent: 5999236 (1999-12-01), Nakajima et al.

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