RISC architecture computer configured for emulation of the instr

Details RISC architecture computer configured for emulation of the instr RISC architecture computer configured for emulation of the instr

1994-03-25

1996-11-12

Bowler, Alyssa H.

Boots, shoes, and leggings

395500, 395376, 364DIG1, 36423272, 3642597, 3642599, G06F 930, G06F 9312, G06F 9315, G06F 9318

Patent

active

055749275

ABSTRACT:
A RISC architecture computer configured for emulating the instruction set of a target computer to execute software written for the target computer, e.g., an Intel 80X86, a Motorola 680X0 or a MIPS R3000. The apparatus is integrated with a core RISC computer to form a RISC computer that executes an expanded RISC instruction. The expanded RISC instruction contains data fields which designate indirect registers that point to emulation registers that correspond to registers in the target computer. The width of the emulation registers is at least the width of those in the target computer. However, a field in the expanded RISC instruction restricts the emulated width to that required by a particular emulated instruction. Additionally, the expanded RISC instruction contains a field which designates the emulation mode for condition codes and selects logic to match the condition codes of the target computer. Target instructions are parsed and dispatched to sequences of one or more expanded RISC instructions to emulate each target instruction.

REFERENCES:
patent: 4992934 (1991-02-01), Portanova et al.
patent: 5136696 (1992-08-01), Beckwith et al.
patent: 5226126 (1993-07-01), McFarland et al.
patent: 5392408 (1995-02-01), Fitch
patent: 5430862 (1995-07-01), Smith et al.
patent: 5438668 (1995-08-01), Coon et al.
Selzer; "Four ways to Fake an X86; Picks Strengths, Minuses to Determine Suitability for Tasks; Software Emulators rarely replace an X86 system; Cloners see Their Future in RISC Cores". PC Week; Nov. 1994.

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