Analog multiplexer

Coded data generation or conversion – Analog to or from digital conversion – Multiplex

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307243, H03K 1756

Patent

active

049857037

ABSTRACT:
An analog multiplexer comprises MOS FET circuits of (n+1) in number corresponding to analog input terminals of (n+1) in number, and circuits of (n+1) in number for applying a fixed electric potential to the MOS FET circuits, where n is a positive integer (in =1, 2, 3, . . . ). The MOS FET circuit includes first and second MOS FET pairs each including n and p-channel MOS FETs which are connected to face each other. In a selected state of an analog signal, a corresponding MOS FET circuit is turned on in the application of a selection signal to gate electrodes of the n-channel MOS FETs and an inverted signal of the selection signal to gate electrodes of the p-channel MOS FETs. In a non-selected state of an analog signal, corresponding MOS FET circuits are turned on, and the fixed electric potential is applied to a connecting point between the first and second MOS FET pairs in each non-selected MOS FET circuit.

REFERENCES:
patent: 4551634 (1985-11-01), Takahashi et al.
patent: 4556804 (1985-12-01), Dewitt
patent: 4645944 (1987-02-01), Uya
patent: 4695749 (1987-09-01), Lam

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