Boots – shoes – and leggings
Patent
1993-09-20
1996-11-12
Teska, Kevin J.
Boots, shoes, and leggings
395800, 395376, 364DIG1, G06F 300, H01J 900
Patent
active
055748872
ABSTRACT:
An apparatus and method for emulation routine pointer prefetch are disclosed. The apparatus includes an emulated program counter (EPC), a prefetch state machine, a summing device, an opcode storage device, and a pointer storage device. The EPC, opcode storage device and pointer storage device are coupled to a bus to receive, store and output an emulated program counter value, an opcode value and a pointer to a next emulation routine. The EPC, opcode storage device, and pointer storage device are controlled by the prefetch state machine, which also is coupled to the bus to detect a reference to a reserved memory address and stores an updated emulated program counter value in the EPC using the summing device. The prefetch state machine uses the EPC value to prefetch the next source instruction to be emulated in a first memory operation. A portion of the prefetched source instruction is the opcode value and is stored in the opcode storage device. The prefetch state machine uses the opcode value in a second memory operation to retrieve a pointer to a corresponding emulation routine which is stored in the pointer storage device. The method for emulation routine pointer prefetch preferably comprises the steps of determining if a currently executing emulation routine has issued an instruction to update the EPC; prefetching a next source instruction based upon the value of the EPC; and using an opcode within the prefetched source instruction to prefetch a pointer to a next emulation routine corresponding to the prefetched source instruction.
REFERENCES:
patent: 3698007 (1972-10-01), Malcolm et al.
patent: 4003033 (1977-01-01), O'Keefe et al.
patent: 4087857 (1978-05-01), Joyce et al.
patent: 4179737 (1979-12-01), Kim
patent: 4402042 (1983-08-01), Guttag
patent: 4587612 (1986-05-01), Fisk et al.
patent: 4714994 (1987-12-01), Oklobdzija et al.
patent: 4780819 (1988-10-01), Kashiwagi
patent: 4785392 (1988-11-01), Maier et al.
patent: 4791557 (1988-12-01), Angel et al.
patent: 4812975 (1989-03-01), Adachi et al.
patent: 4847753 (1989-07-01), Matsuo
patent: 4894772 (1990-01-01), Langendorf
patent: 4992934 (1991-02-01), Portanova et al.
patent: 5077657 (1991-12-01), Cooper et al.
patent: 5140687 (1992-08-01), Dye et al.
patent: 5167023 (1992-11-01), de Nicholas et al.
patent: 5237664 (1993-08-01), Usami
patent: 5249266 (1993-09-01), Dye et al.
patent: 5361389 (1994-11-01), Fitch
patent: 5408622 (1995-04-01), Fitch
McBride, M., "Microprogrammable Chip Set Emulates Mainfraime Processing", Electronic Design, Aug. 1984, pp. 229-234, 236, 238, 240.
"High Performance Dual Architecture Processor", IBM Technical Disclosure Bulletin, Feb. 1993, pp. 231-234.
Apple Computer Inc.
Louis-Jacques Jacques
Sueoka, Esq. Greg T.
Teska Kevin J.
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