Patent
1992-09-25
1996-11-12
Lane, Jack A.
395419, G06F 1210
Patent
active
055748775
ABSTRACT:
A TLB which has at least two page frame numbers (PFN) associated with each tag (Virtual Page Number) is provided. Thus, a match will produce two possible physical page frame numbers. The selection between these two is controlled by a bit provided directly from the virtual address, without translation. This bit is preferably the least significant bit of the virtual page number, or the first bit after the physical offset. This structure effectively doubles the capacity of the TLB without doubling the number of tags. Although the virtual space covered by each tag or VPN is necessarily restricted to two contiguous areas, the invention allows these two contiguous areas to be mapped to completely different regions of the physical address space. In addition to limiting the number of tags required, the number of comparators required is also similarly limited, with only the number of physical page frame numbers stored being required to double.
REFERENCES:
patent: 4622653 (1986-11-01), McElroy
patent: 4942521 (1990-07-01), Hanawa et al.
patent: 5226133 (1993-07-01), Taylor et al.
patent: 5263140 (1993-11-01), Riordan
patent: 5287475 (1994-02-01), Sawamoto
Dixit Ashish B.
Killian Earl A.
Lane Jack A.
Silicon Graphics Inc.
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