Patent
1996-04-09
1996-11-12
Canney, Vincent P.
G06F 1100
Patent
active
055748503
ABSTRACT:
Circuitry for reconfiguring a pin of an integrated circuit. The reconfiguration circuitry includes a multiplexer, whose output is coupled to the pin. Upon powering-up the integrated circuit, the multiplexer couples to the pin to a first signal that conforms to the historical definition of the pin's function. The user reconfigures the pin by issuing a command that causes the multiplexer to couple a second signal to the pin. This second signal behaves in a manner more useful to the user. The switch from the first signal to the second is achieved via a reconfiguration register, which generates the multiplexer's select signal. A control engine within the integrated circuit responds to the reconfiguration command by writing once to the reconfiguration register. The pin remains reconfigured until the integrated device is powered down.
REFERENCES:
patent: 4963768 (1990-10-01), Agrawal et al.
patent: 5331571 (1994-07-01), Aronoff et al.
"28F008SA-L 8-Bit (1 MBit.times.8) Flashfile.TM. Memory," Intel Flash Memory Handbook, vol. 1, pp. 3-77 through 3-104 (1994).
"28F008SA 8-MBit (1-MBit.times.8) Flashfile.TM. Memory," Intel Flash Memory Handbook, vol. 1, pp. 3-49 through 3-76.
Canney Vincent P.
Intel Corporation
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