Boots – shoes – and leggings
Patent
1981-11-09
1985-01-22
Chan, Eddie P.
Boots, shoes, and leggings
G06F 920
Patent
active
044955650
ABSTRACT:
An address matcher and process for same used as an aid in debugging computer programs. Each of a plurality of random access memories (RAMs) is addressed by a different subfield of a computer memory address so that each access of the computer memory also causes a read of each of the RAMs. Each RAM is programmed with encoded data to define upper and lower block addresses for that subfield of the computer memory address with which it is associated. An output circuit decodes the encoded data read from each of the RAMs as a result of a computer memory access and generates a signal if the computer memory address lies within the monitored address block.
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"Storage Protection Mechanism for Processor" Martinez IBM Technical Disclosure Bulletin, vol. 22, No. 10, Mar. 1980.
AT&T Bell Laboratories
Chan Eddie P.
Herndon J. W.
Lee Jameson
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