Patent
1975-11-20
1977-07-05
Schaefer, Robert K.
58 23R, G04C 300
Patent
active
040331091
ABSTRACT:
The time correction circuit comprises a switch, a first shift register circuit including two cascade connected shift registers driven by a 32 Hz clock pulse for shifting an electric signal generated by the operation of the switch, a second shift register circuit connected to the first shift register circuit and including two cascade connected shift registers driven by 1 Hz clock pulse for detecting the fact that whether the switch is maintained operated for an interval longer than a predetermined interval or not, a NOR gate circuit connected to receive the output from the two shift registers of the first shift register circuit, an AND gate circuit connected to receive the output signals from the first and second shift register circuits and a clock pulse having a predetermined frequency and an OR gate circuit connected to receive the output signals from the NOR gate circuit and the AND gate circuit.
REFERENCES:
patent: 3664116 (1972-05-01), Emerson et al.
patent: 3756013 (1973-09-01), Bergey et al.
patent: 3810356 (1974-05-01), Fujita
patent: 3841081 (1974-10-01), Komaki
patent: 3928959 (1975-12-01), Naito
Takase Tsuneo
Yamaguchi Tetsuo
Miska Vit W.
Schaefer Robert K.
Tokyo Shibaura Electric Co. Ltd.
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