Planar antifuse and method of fabrication

Details Planar antifuse and method of fabrication Planar antifuse and method of fabrication

1995-12-29

1996-11-12

Chaudhari, Chandra

Fishing, trapping, and vermin destroying

437192, 437922, H01L 21441

Patent

active

055739717

ABSTRACT:
A method of forming an antifuse. A first conductive layer is deposited over a substrate. Next, a capping layer is deposited onto the conductive layer. An antifuse layer is then deposited onto the capping layer. A barrier layer is then deposited onto the antifuse layer. Next, the first conductive layer, the capping layer, the antifuse layer, and the barrier layer are patterned into a metal stack. A disposable post is then formed on the barrier layer of the patterned metal stack. The barrier layer and the antifuse layer are then etched substantially in alignment with the disposable post to leave a first metal interconnect. Next, an insulating layer is formed over the substrate including the first metal interconnect and the disposable post wherein the insulating layer is made substantially planar with the disposable post. The disposable post is then removed to form an aperture in the insulating layer. A second conductive layer is then deposited into the aperture and onto the barrier layer.

REFERENCES:
patent: 5353246 (1994-10-01), Tsang et al.
patent: 5362676 (1994-11-01), Gordon et al.
patent: 5395797 (1995-03-01), Chen et al.
patent: 5440167 (1995-08-01), Iranmanesh

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