Method for fabricating stacked capacitors of semiconductor devic

Fishing – trapping – and vermin destroying

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437 60, 437919, H01L 2170, H01L 2700

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active

055739687

ABSTRACT:
A method for fabricating capacitors of a semiconductor device, capable of forming a storage electrode provided at its side walls with irregularity providing an increased surface area in accordance with an etch process using a difference in etch selectivity between doped and undoped silicon films. The method includes forming doped and undoped amorphous conduction films in an alternating manner over a semiconductor substrate formed with a contact hole, thereby forming a first amorphous conduction layer having a multi-layer structure, forming an insulating film pattern on the first amorphous conduction layer, forming undoped and doped amorphous conduction films in an alternating manner over the resulting structure, thereby forming a second amorphous conduction layer, etching the resulting structure under a condition that the insulating film pattern and lower insulating layer are used as an etch barrier, annealing the amorphous conduction layers, thereby forming crystallized conduction layers without diffusing an impurity, etching doped portions of the conduction layers, thereby providing an irregularity structure at the conduction layers, and doping impurity ions in undoped portions of the conduction layers, thereby forming a cylindrical storage electrode having the irregularity structure at each side wall thereof.

REFERENCES:
patent: 5286668 (1994-02-01), Chou
patent: 5403767 (1995-04-01), Kim
patent: 5422295 (1995-06-01), Choi et al.

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