Slaving calculator chips

Communications: electrical – Digital comparator systems

Patent

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Details

307269, G06F 1100

Patent

active

039709957

ABSTRACT:
An electronic calculator or data processing system implemented on semi-conductor chips to operate several chips in synchronism where at least one element common to the operation of all chips is responsive to sequentially generated operating states.
A master clock applies clock pulses to the clock input terminal of one chip.
A control gate is provided in the circuit leading to the clock input terminals of the other chip or chips.
A comparator is connected to selected operating state output terminals from both or all of said chips and is connected to the control gate for inhibiting flow of clock signals to the other chip or chips so long as said selected states differ.

REFERENCES:
patent: 3471686 (1969-10-01), Connell
patent: 3668431 (1972-06-01), Locke
patent: 3725793 (1973-04-01), Phillips
patent: 3800129 (1974-03-01), Umstattd
patent: 3810119 (1974-05-01), Zieve et al.

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