Shift control signal generation circuit for floating-point arith

Details Shift control signal generation circuit for floating-point arith Shift control signal generation circuit for floating-point arith

1987-07-09

1990-03-13

Harkcom, Gary V.

Boots, shoes, and leggings

36471508, G06F 738

Patent

active

049087886

ABSTRACT:
A logic circuit comprises a subtracter for receiving first and second binary data and outputting a difference between the first and second data, a decoder for outputting the output of the subtracter when the first data is greater than the second data and an inversion signal of the output from the subtracter when the second data is greater than the first data, and a shifter for outputting the output of the decoder without modification when the first data is greater than the second data and a shifted value of the output from the decoder when the second data is greater than the first data.

REFERENCES:
patent: 3814925 (1974-06-01), Spannagel
patent: 4366548 (1982-12-01), Kregness et al.
Hamacher et al, Computer Organization, McGraw-Hill, 1978, Arithmetic 219.

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