Stripped nitride structure and process therefor

Details Stripped nitride structure and process therefor Stripped nitride structure and process therefor

1978-04-21

1981-02-03

Wojciechowicz, Edward J.

357 23, 357 45, 357 54, H01L 2702

Patent

active

042491916

ABSTRACT:
A method for fabricating MOS and MNOS transistors on a common substrate which strips the silicon nitride required for MNOS operation away from areas where it is not required. The removal of the nitride from the MOS gate eliminates cumulative threshold instability and allows separate optimization of both MOS and MNOS structures in a single process. Removal of nitride from other areas such as the contact regions prevents undercut structures of nitride dielectric from being formed during contact hole fabrication and thus minimizes reliability problems and yield limitations. Further an improved MNOS structure is produced which has strips of nitride in the gate region spaced apart from the diffused regions, thereby minimizing diode breakdown and long term threshold instability.

REFERENCES:
patent: 4148049 (1979-04-01), Cricchi et al.

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