Logic circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307214, 307297, 307310, 307317A, 307362, H03K 19086, H03K 19003

Patent

active

042490910

ABSTRACT:
A current mode logic circuit (CML) consisting of emitter-coupled transistors, one acting as a reference element and the other as an input element, a regulation transistor for regulating the emitter current of the transistors, a biasing circuit composed of a diode, a Schottky diode and a resistance element connected in series between a V.sub.EE terminal and a V.sub.CC terminal and a biasing transistor, the collector of the biasing transistor being connected through a resistor to V.sub.CC and connected to the base of the reference transistor, the emitter of which being connected through a resistor to V.sub.EE, the bases of the regulation transistor and the biasing transistor being connected to the point between the resistance element and the Schottky diode, so that the emitter current of the transistors and the reference voltage are automatically regulated, whereby CML maintains both the output levels and the input threshold level almost invariant irrespective of changes of transistor characteristics due to temperature and changes in supply voltage, to provide a circuit which is capable of operating on low-power potential and low-amplitude input signal.

REFERENCES:
patent: 3502900 (1970-03-01), Straub
patent: 3751680 (1973-08-01), Hodges
patent: 3758791 (1973-09-01), Taniguchi et al.
T. W. Bayer et al., "FET to Bipolar Receiver with Overvoltage Protection", IBM Technical Disclosure Bulletin, vol. 18, No. 8, Jan. 1976, p. 2510.

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