Semiconductor memory device capable of preventing noise from occ

Details Semiconductor memory device capable of preventing noise from occ Semiconductor memory device capable of preventing noise from occ

1998-04-13

2000-07-11

Nelms, David

Static information storage and retrieval

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36518513, 36518525, 365149, G11C 800

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060882832

ABSTRACT:
In a semiconductor memory, in order to eliminate unbalance of the coupling capacitance between a bit line and a bus line so as to prevent noises from occurring, a layer of a column selection signal line is disposed in an intermediate layer position between a layer of the bit line and a layer of the bus line. Also, the width of the column selection line is increased to cover the bit lines whose width are different from each other due to a contact, to thereby shield the bit line and the bus line by the column selection signal line, and to balance of the coupling capacitance between the bit line and the bus line.

REFERENCES:
patent: 5742545 (1998-04-01), Kato
patent: 5757707 (1998-05-01), Abe
patent: 5838604 (1998-11-01), Tsuboi et al.

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