Process for fabricating a self-aligned micrometer bipolar transi

Details Process for fabricating a self-aligned micrometer bipolar transi Process for fabricating a self-aligned micrometer bipolar transi

1981-01-12

1982-06-08

Rutledge, L. Dewayne

Metal working

Method of mechanical manufacture

Assembling or joining

29576E, 29576W, 29578, 148174, 148175, 156643, 156653, 156657, 357 20, 357 34, 357 50, 357 54, 357 56, 357 59, H01L 21302, H01L 2131

Patent

active

043332277

ABSTRACT:
A method for device fabrication utilizing a self-aligned process. A combination of advanced semiconductor processing techniques including Deep Dielectric Isolation by reactive-ion etching, etching and refilling, planarizing with oxides and resists, and differential thermal oxidation are used to form devices having small vertical as well as horizontal dimensions. The device region is surrounded by a deep oxide trench which has nearly vertical sidewalls which extend from the epitaxial silicon surface through the N+ subcollector region into the P substrate. The width of the deep trench is about 2 .mu.m to 3 .mu.m. A shallow oxide trench extends from the epitaxial silicon surface to the upper portion of the N+ subcollector and separates the base and collector contact. The surface of the isolation regions and the silicon where the transistor is formed is coplanar. As shown in FIG. 1, the fabricated bipolar transistor has a mesa-type structure. The transistor base dimension is only slightly larger than the emitter. This small base area results in a low collector-base capacitance which is a very important parameter in ultra-high performance integrated circuit devices. Contact to the transistor base in the disclosed structure is achieved by a thick heavily boron doped polysilicon layer which is formed by an etch and refill process and which surrounds the emitter and makes lateral contact to the active base.

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