Flash memory array with self-limiting erase

Details Flash memory array with self-limiting erase Flash memory array with self-limiting erase

1996-04-22

1996-11-19

Nguyen, Tan T.

Static information storage and retrieval

Floating gate

Particular biasing

3651853, G11C 700, G11C 1600

Patent

active

055769934

ABSTRACT:
A flash memory array with self-limiting erase for preventing over-erasure utilizes a self-limiting-erase floating gate transistor coupled to the memory array or to each row of memory cells. The self-limiting-erase transistor has a smaller threshold voltage than the memory cells. When all memory cells or one row of memory cells are erased, the drain of the transistor is connected via a feedback path to all word lines of the memory array or to the corresponding word line for that row of memory cells. When the self-limiting-erase transistor is turned on due to full erasing, the potential of the word lines is pulled up to the erasing voltage which is applied at the sources of the memory cells, thereby the erase operation is stopped automatically.

REFERENCES:
patent: 4797856 (1989-01-01), Lee et al.
patent: 5357466 (1994-10-01), Hong
patent: 5428578 (1995-06-01), Kaya et al.

Affiliated with

Also associated with

Rating

Flash memory array with self-limiting erase does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Flash memory array with self-limiting erase, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Flash memory array with self-limiting erase will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-546165