Patent
1987-10-13
1990-03-13
Gonzalez, Frank
357 41, H01L 2348
Patent
active
049086901
ABSTRACT:
A semiconductor integrated circuit device includes a semiconductor substrate and a wiring layer formed on the substrate. An output buffer transistor is provided with its gate formed along the direction of the wiring. The resulting device has improved area efficiency and is less susceptible to wiring element slide without requiring slits to be formed in the wiring structure--and thus also has lower current density.
REFERENCES:
patent: 4060828 (1977-11-01), Satonaka
patent: 4740825 (1988-04-01), Saeki
"Stress Analysis of Passivation Film Crack for Plastic Molded LSI Caused by Thermal Stress", S. Okikawa et al, Musashi Works, Hitachi Ltd., 1450, Josuihon-cho, Kodaira-shi, Tokyo, 187 Japan, ISFTA (1983), pp. 275-280.
Hata Masayuki
Nakagawa Hiromasa
Gonzalez Frank
Mitsubishi Denki & Kabushiki Kaisha
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