Semiconductor memory device having positive feedback sense ampli

Details Semiconductor memory device having positive feedback sense ampli Semiconductor memory device having positive feedback sense ampli

1996-01-18

1997-04-01

Nelms, David C.

Static information storage and retrieval

Floating gate

Particular biasing

365207, 365208, G11C 1134, G11C 702

Patent

active

056173555

ABSTRACT:
In a semiconductor memory device including ROM cells, a digit line for receiving read data from a selected one of the at the memory cells, and a bias circuit for amplifying a voltage at the digit line, a differential amplifier, which has a positive phase input, a negative phase input, a positive phase output and a negative phase output, is provided. The positive phase input is connected to the output of the bias circuit. The negative phase output is connected to the negative phase input, thereby establishing a positive feedback loop in the differential amplifier.

REFERENCES:
patent: 5126974 (1992-06-01), Sasaki et al.
patent: 5479374 (1995-12-01), Kobayashi et al.
patent: 5528544 (1996-06-01), Kohno
S. Tanaka et al., "A Programmable 256K CMOS EPROM with On-Chip Test Circuits", IEEE International Solid-State Circuits Conference, Feb. 23, 1984, pp. 148-149.

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