Multiple operation mode microcontroller

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G05B 1101

Patent

active

056173105

ABSTRACT:
A microcontroller capable of operating in any one of several operation modes and includes first latch circuits which latch first mode signals from first external nodes at a first timing and second latch circuits latching second mode signals from the same external nodes at a second timing. Operation modes are switched by using the mode signals stored in the first and second latch circuits, so that a single external node can provide two bits for expressing the operation modes. Thus, the number of bits used to represent the mode signal can be increased without increasing the number of external nodes. Also provided is a microcontroller in which the time required for a test can be reduced by eliminating the waiting period for clock generation to be stabilized.

REFERENCES:
patent: 5438672 (1995-08-01), Dey
patent: 5454114 (1995-09-01), Yach et al.
patent: 5455937 (1995-10-01), Berman et al.
patent: 5519714 (1996-05-01), Nakamura et al.

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