Semiconductor memory device having buried structure to suppress

Details Semiconductor memory device having buried structure to suppress Semiconductor memory device having buried structure to suppress

1991-02-28

1991-09-10

James, Andrew J.

357 14, 357 41, 357 51, 357 88, 357 90, H01L 2768, H01L 2992, H01L 2702

Patent

active

050478184

ABSTRACT:
A semiconductor memory device comprises a capacitor and a transistor formed on a main surface of a semiconductor substrate and a buried layer of high impurity concentration formed in the substrate, wherein the buried layer has the same conductivity type as that of the substrate and is formed shallow under the capacitor and deep under the transistor.

REFERENCES:
patent: 4355374 (1982-10-01), Sakai et al.
patent: 4745454 (1988-05-01), Erb
"Dynamic Ram Cell Structure", IBM Technical Disclosure Bulletin, vol. 27, No. 12, May 1985.
IEDM,"A Buried N-Grid for Protection Against Radiation Induced Charge Collection in Electronic Circuits", by M. R. Wordeman et al., pp. 40-43, 1981.
IEEE Transaction on Electron Device, "The Hi-C RAM Cell Concept", by Al F. Tasch et al., vol. ED-25, No. 1, Jan. 1978, pp. 33-41.

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