RISC microprocessor architecture with multi-bit tag extended ins

Details RISC microprocessor architecture with multi-bit tag extended ins RISC microprocessor architecture with multi-bit tag extended ins

1990-05-02

1993-04-06

Lee, Thomas C.

Boots, shoes, and leggings

364736, 3647365, 364748, 364258, 3642597, 3642598, 3642612, 3642448, 3649371, 3649469, 364DIG1, 395375, G06F 700, G06F 1500

Patent

active

052010562

ABSTRACT:
A RICS microprocessor architecture is provided with a plurality of data registers and instruction registers each having a multi-bit extension for extending the width of the data and instruction words processed therethrough. A first plurality of bits within a tag field of the multi-bit extension are reserved for identifying the data type of the data words while a second plurality of bits provide instruction dependent control. The multi-bit extension allows full precision computation for the data words requiring the tag field to identify the data type thereof while retaining full precision compatibility for data words not needing tag field identifiers. At least two bits of the first plurality of bits in tag field are reserved for identifying one of several primary categories of data types and at least two bits identify one of several subtype categories within each of the plurality of primary categories. An extended set of machine instructions is also provided for efficient usage of the multi-bit extension appended to the data and instruction registers.

REFERENCES:
patent: 4241396 (1980-12-01), Mitchell et al.
patent: 4542476 (1985-09-01), Nagafuji
patent: 4734852 (1988-03-01), Johnson et al.
patent: 4766566 (1988-08-01), Chuang
patent: 4789957 (1988-12-01), Niehaus et al.
patent: 4841436 (1989-06-01), Asano et al.
patent: 4890253 (1989-12-01), Jabusch et al.

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